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Project: Two-Digit Logic Counter — pcbelectronics.co.uk
PROJECT / LOGIC ONLY

Two-digit event counter — no microcontroller, just logic ICs

This is a 0–99 counter built entirely from two CMOS counter/decoder chips, two 7-segment displays, and passive components. No microcontroller, no software — every count, carry and reset is handled by the chips' internal logic. Press the count button to advance the units digit; on the ninth-to-zero rollover it automatically carries into the tens digit. A separate button clears both digits back to zero.

Schematic

Schematic of a two-digit logic counter Two CD4026 decade counters each drive a seven-segment display through a resistor network, cascaded via carry-out to clock-in, with pushbutton count and reset inputs debounced by RC networks. DISP1 units abc defg com → GND RN1 • 330Ω ×7 U1a U1b U1c U1d U1e U1f U1g DISP2 tens abc defg com → GND RN2 • 330Ω ×7 U2a U2b U2c U2d U2e U2f U2g U1 CD4026 units decade +5V C2 100nF CLK_IN 1 CLK 2 INH +5V 3 DEI RST 15 RESET 5 CO U1a 6 a U1b 7 b U1c 9 c U1d 10 d U1e 11 e U1f 12 f U1g 13 g carry out → clocks tens digit U2 CD4026 tens decade +5V C3 100nF 1 CLK 2 INH +5V 3 DEI RST 15 RESET 5 CO (spare) U2a 6 a U2b 7 b U2c 9 c U2d 10 d U2e 11 e U2f 12 f U2g 13 g +5V SW1 COUNT CLK_IN R1 100kΩ C1 100nF +5V SW2 RESET RST R2 100kΩ

Flags with matching text (like U1a or +5V) are the same electrical node — they're labeled instead of wired across the page to keep the drawing readable. Ground symbols (the three shrinking bars) are all common as well.

Parts list

RefPartQty
U1, U2CD4026 decade counter / 7-segment driver2
DISP1, DISP2Common-cathode 7-segment display2
RN1, RN2330Ω isolated resistor network, 7 elements (or 7 loose 330Ω resistors each)2
R1, R2100kΩ resistor (pull-down)2
C1100nF ceramic capacitor (count-button debounce)1
C2, C3100nF ceramic capacitor (supply decoupling, one per IC)2
SW1, SW2Momentary pushbutton, normally open2
—5V supply (regulated wall adapter or 4×AA)1

How it works

Each CD4026 is a Johnson decade counter with a built-in 7-segment decoder, so one chip both counts and drives a display directly — no separate logic gates needed. SW1 pulses the clock input of U1; every press advances the units digit by one. R1 holds the clock line low between presses, and C1 filters the switch contact's mechanical bounce so one press reliably registers as one count rather than several.

U1's carry-out pin goes high once per ten counts, right as the units digit rolls from 9 back to 0. That pulse is wired directly to U2's clock input, so the tens digit advances automatically on every rollover — the same cascading trick used inside multi-digit counter ICs and calculators. SW2 ties both chips' reset pins high at once, clearing the whole display to 00 regardless of the current count.

The clock-inhibit and display-enable pins are simply tied to ground and +5V respectively to keep both chips permanently counting and permanently displaying — this project doesn't need to pause counting or blank the display, so those control inputs are fixed rather than driven.

Build notes

  • Any 5–15V CMOS-compatible supply works; 5V is the easiest match for common 7-segment displays' current draw with 330Ω segment resistors.
  • Confirm your displays are common cathode — a common-anode display will light every segment except the ones you intend, since the CD4026's outputs drive segments high, not low.
  • If you want a third digit (hundreds), U2's spare carry-out pin cascades to a third CD4026 exactly the same way U1 feeds U2.
  • Socket the ICs rather than soldering them directly — it makes debugging a dead display or a miscounting stage far less painful.
  • Both decoupling capacitors should sit as close to their IC's power pins as your layout allows, which keeps the counter immune to noise from the switch contacts.
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